Performance and power evaluation of an in-line accelerator

Authors:
Alejandro Rico;Jeff H. Derby;Robert K. Montoye;Timothy H. Heil;Chen-Yong Cher;Pradip Bose
Affiliations:
Barcelona Supercomputing Center, Barcelona, Spain;IBM Corporation, Research Triangle Park, NC, USA;IBM TJ Watson Research Center, Yorktown Heights, NY, USA;IBM Corporation, Rochester, MN, USA;IBM TJ Watson Research Center, Yorktown Heights, NY, USA;IBM TJ Watson Research Center, Yorktown Heights, NY, USA
Venue:
Proceedings of the 7th ACM international conference on Computing frontiers
Year:
2010

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Abstract

In this paper we evaluate the performance and power of a processor-attached in-line accelerator. The accelerator provides high-performance SIMD computing and power efficiency by means of a very large register file and a set of vector multimedia extensions based on IBM's PowerPC VMX. Our experiments show significant performance improvements and power reduction, compared to a baseline vector execution unit, mainly due to the drastic decrease of memory accesses caused by the software-managed locality of the very large register file. Total execution time is, on average, reduced by 61%, while consuming 55% less energy.