In transition from global to modular temporal reasoning about programs
Logics and models of concurrent systems
Temporal verification of reactive systems: safety
Temporal verification of reactive systems: safety
An automata-theoretic approach to linear temporal logic
Proceedings of the VIII Banff Higher order workshop conference on Logics for concurrency : structure versus automata: structure versus automata
Synthesis of Communicating Processes from Temporal Logic Specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Characterizing Correctness Properties of Parallel Programs Using Fixpoints
Proceedings of the 7th Colloquium on Automata, Languages and Programming
The ForSpec Temporal Logic: A New Temporal Property-Specification Language
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
A Practical Introduction to PSL (Series on Integrated Circuits and Systems)
A Practical Introduction to PSL (Series on Integrated Circuits and Systems)
The temporal logic of programs
SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
The definition of a temporal clock operator
ICALP'03 Proceedings of the 30th international conference on Automata, languages and programming
Augmenting a regular expression-based temporal logic with local variables
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
HVC '08 Proceedings of the 4th International Haifa Verification Conference on Hardware and Software: Verification and Testing
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Modern hardware designs are typically based on multiple clocks. While a singly-clocked hardware design is easily described in standard temporal logics, describing a multiply-clocked design is cumbersome. Thus, it is desirable to have an easier way to formulate properties related to clocks in a temporal logic. In [6] a relatively simple solution built on top of the traditional ltl semantics was suggested and adopted by the IEEE standard temporal logic psl. The suggested semantics was examined relative to a list of design goals, and it was shown that it answered all requirements except for preserving the least fixed point characterization of the until operator under multiple clocks. In this work we show that with a minor addition to the semantics of [6] this requirement is met as well.