SkePU: a multi-backend skeleton programming library for multi-GPU systems
Proceedings of the fourth international workshop on High-level parallel programming and applications
Exceptions for algorithmic skeletons
Euro-Par'10 Proceedings of the 16th international Euro-Par conference on Parallel processing: Part II
A survey of algorithmic skeleton frameworks: high-level structured parallel programming enablers
Software—Practice & Experience - Focus on Selected PhD Literature Reviews in the Practical Aspects of Software Technology
Cache size in a cost model for heterogeneous skeletons
Proceedings of the fifth international workshop on High-level parallel programming and applications
Algorithmic skeletons for multi-core, multi-GPU systems and clusters
International Journal of High Performance Computing and Networking
Parallel computation skeletons with premature termination property
FLOPS'12 Proceedings of the 11th international conference on Functional and Logic Programming
A software architecture for parallel list processing on grids
PPAM'11 Proceedings of the 9th international conference on Parallel Processing and Applied Mathematics - Volume Part I
Structured data access annotations for massively parallel computations
Euro-Par'12 Proceedings of the 18th international conference on Parallel processing workshops
Self-Configuration and Self-Optimization Autonomic Skeletons using Events
Proceedings of Programming Models and Applications on Multicores and Manycores
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This paper argues that algorithmic skeletons are a suitable programming model for multi-core architectures. The high-level abstractions offered by algorithmic skeletons provide a simple way for non-parallel programmers to address parallel programming. Previous algorithmic skeleton frameworks and libraries have addressed distributed computing environments such as Clusters and Grids. This paper proposes a parallel skeleton library, Skandium; and concludes, after an experimental evaluation, that algorithmic skeletons are an effective methodology to program multi-core architectures.