Scalable architecture for a contention-free optical network on-chip
Journal of Parallel and Distributed Computing
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In this paper, we extract analytical models for data transmission delay, power consumption, and energy dissipation of optical and traditional NoCs. Utilizing extracted models, we compare optical NoC with electrical one for varying values of link length and degree of multiplexing and calculate lower bound limit on the optical link length below which optical on-chip network loses its efficiency. Based on this constraint, we propose a novel hierarchical on-chip network architecture, named as H2NoC, which benefits from optical transmissions in large scale SoCs and overcomes the scalability problem resulted from lower bound limit on the optical link length. Performing a series of simulation-based experiments, we study efficiency of H2NoC along with its power and energy consumption and data transmission delay. Through experimental results, we show that despite slight delay increment in H2NoC compared to non-hierarchical ONoC, later architecture reduces power and energy dissipation of the network.