Near-Shannon-limit linear-time-encodable nonbinary irregular LDPC codes

Authors:
Jie Huang;Shengli Zhou;Peter Willett
Affiliations:
Dept. of Electrical and Computer Engineering, University of Connecticut, Storrs, CT;Dept. of Electrical and Computer Engineering, University of Connecticut, Storrs, CT;Dept. of Electrical and Computer Engineering, University of Connecticut, Storrs, CT
Venue:
GLOBECOM'09 Proceedings of the 28th IEEE conference on Global telecommunications
Year:
2009

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Abstract

In this paper, we present a novel method to construct nonbinary irregular LDPC codes whose parity check matrix has only column weights of 2 and t, where t ≥ 3. The constructed codes can be encoded in linear time and in a parallel fashion. Also, they can achieve near-Shannon-limit performance over both AWGN and Rayleigh fading channels with a moderate field size. Analysis based on nonbinary EXIT charts is presented. Codes constructed by the proposed method with block lengths ranging from 1,000 bits to 10,000 bits are simulated. Simulation results show that codes of rate 1/2 and length 10,000 bits can achieve block-error-rate (BLER) of 10-5 within 1.1 dB and 1.3 dB away from the Shannon limits of the AWGN and Rayleigh channels, respectively. In an AWGN channel, codes of rate r = 8/9 and length around 4,000 bits can achieve BLER of 10-5 within 1.1 dB from the Shannon limit, while codes of rate r = 15/16 and length around 9,000 bits can achieve BLER of 10-5 within 1.0 dB from the Shannon limit. We conjecture that to further lower the error floor (e.g., to a BLER of 10-10), a column weight no less than 3 is preferred and may be necessary, especially for codes with high rate and over Galois fields of small to moderate sizes.