On-chip integrated antenna structures in CMOS for 60 GHz WPAN systems

  • Authors:
  • Felix Gutierrez, Jr.;Kristen Parrish;Theodore S. Rappaport

  • Affiliations:
  • The University of Texas at Austin, Austin, TX;The University of Texas at Austin, Austin, TX;The University of Texas at Austin, Austin, TX

  • Venue:
  • GLOBECOM'09 Proceedings of the 28th IEEE conference on Global telecommunications
  • Year:
  • 2009

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Abstract

We present several on-chip antenna structures that may be fabricated with standard CMOS technology for use at millimeter wave frequencies. On-chip antennas for wireless personal area networks (WPANs) promise to reduce interconnection losses and greatly reduce wireless transceiver costs, while providing unprecedented flexibility for device manufacturers. We present the current state of research in on-chip integrated antennas, highlight several pitfalls and challenges for on-chip design, modeling, and measurement, and propose several antenna structures that derive from the microwave and HF communication fields. We also describe an experimental test apparatus for performing measurements on RFIC systems with on-chip antennas at The University of Texas at Austin.