Reduced-complexity mimo detector with close-to ml error rate performance
Proceedings of the 17th ACM Great Lakes symposium on VLSI
A real-time MIMO-OFDM mobile WiMAX receiver: Architecture, design and FPGA implementation
Computer Networks: The International Journal of Computer and Telecommunications Networking
Journal of Signal Processing Systems
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In this paper, we present a FPGA prototyping of the MIMO Decoder for the IEEE 802.16e WiMAX mobile systems. The IEEE 802.16e standard supports three types of MIMO space time codes (STC), referred to in the standard by matrix A, B, and C, that achieve different levels of throughput and diversity depending on the quality of the MIMO channels. In particular, the STC matrix A achieves full diversity by employing the Alomuti coding, while the STC matrix B achieves full rate by employing spatial multiplexing and the STC matrix C achieves full rate and diversity by employing the Golden code. In this paper, we present a FPGA architecture of MIMO decoder based on the fixed sphere decoder (FSD) algorithm that achieves close-to ML BER performance with a reduced computational complexity and fixed throughput. We show how a single FSD can be used to decode the different STC by adaptively processing the received signal according to the STC type prior to be fed to the FSD. The FPGA design is incorporated with a QR decomposition of the channel matrix. The proposed FSD achieves fixed and high throughput required for the WiMAX systems. The FPGA implementation is incorporated with a MATLAB simulation model of an FUSC OFDMA-based WiMAX 2x2 MIMO system to validate the hardware design.