Highly integrated fractional-n synthesizer for locatable wireless sensor nodes

  • Authors:
  • Thomas Ubmuller;Robert Weigel;Ralf Eickhoff

  • Affiliations:
  • University of Erlangen-Nuremberg, Erlangen, Germany;University of Erlangen-Nuremberg, Erlangen, Germany;Technische Universitaet Dresden, Dresden, Germany

  • Venue:
  • ICC'09 Proceedings of the 2009 IEEE international conference on Communications
  • Year:
  • 2009

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Abstract

Local positioning systems significantly enhance the value of wireless sensor networks (WSN). This paper presents an integrated synthesizer for localization using frequency modulated continuous wave (FMCW) radar. The synthesizer is based on a fractional-n phase-locked loop (PLL) architecture. All components of the PLL are carefully designed with respect to their power consumption, and the digital parts are implemented in current-mode logic (CML). The complete synthesizer was manufactured in a 0.18µm SiGe BiCMOS process from IBM, and it consumes only 100mW, achieves a phase noise better than -117 dBc/Hz and has a silicon area of 1.15mm2. Due to its high integration level and its optimized design, the synthesizer achieves low power consumption and low phase noise that make it suitable for precise localization in mobile sensor nodes. Localization measurements in indoor environments with multi-path propagation showed mean distance errors about 10 cm.