IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on the 1995 IEEE ASIC conference
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ICCV '99 Proceedings of the International Conference on Computer Vision-Volume 2 - Volume 2
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CVPR '05 Proceedings of the 2005 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (CVPR'05) - Volume 1 - Volume 01
On the Use of SIFT Features for Face Authentication
CVPRW '06 Proceedings of the 2006 Conference on Computer Vision and Pattern Recognition Workshop
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Pattern Recognition Letters
Development of high-speed and real-time vision platform, H3vision
IROS'09 Proceedings of the 2009 IEEE/RSJ international conference on Intelligent robots and systems
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Real-time image recognition at 1000 fps is realized by implementing a parallel processing circuit module to calculate higher-order local auto-correlation (HLAC) features on a high-speed vision platform. The circuit module is compactly designed in order to decrease the number of multiplications required in the HLAC calculation. The circuit module is integrated on a user-specific FPGA of the high-speed vision platform. The high-speed vision platform, on which the HLAC circuit module is hardware-implemented, can extract 25 HLAC features at 1000 fps from 1024 × 1024 pixel images, which include 0th, 1st, and 2nd order HLAC features. In the experimental results, projected images switching at frame rates as high as 250 fps are recognized by using HLAC features extracted at 1000 fps on the high-speed vision platform.