On trapping sets and guaranteed error correction capability of LDPC codes and GLDPC codes

  • Authors:

  • Shashi Kiran Chilappagari;Dung Viet Nguyen;Bane Vasic;Michael W. Marcellin

  • Affiliations:

  • Marvell Semiconductor Inc., Santa Clara, CA and Department of Electrical and Computer Engineering, University of Arizona, Tucson, Arizona;Department of Electrical and Computer Engineering, University of Arizona, Tucson, Arizona;Department of Electrical and Computer Engineering, University of Arizona, Tucson, Arizona;Department of Electrical and Computer Engineering, University of Arizona, Tucson, Arizona

  • Venue:
  • IEEE Transactions on Information Theory
  • Year:
  • 2010

Quantified Score

Hi-index 754.90

Visualization

Abstract

The relation between the girth and the guaranteed error correction capability of γ-left-regular low-density parity-check (LDPC) codes when decoded using the bit flipping (serial and parallel) algorithms is investigated. A lower bound on the size of variable node sets which expand by a factor of at least 3gamma;/4 is found based on the Moore bound. This bound, combined with the well known expander based arguments, leads to a lower bound on the guaranteed error correction capability. The decoding failures of the bit flipping algorithms are characterized using the notions of trapping sets and fixed sets. The relation between fixed sets and a class of graphs known as cage graphs is studied. Upper bounds on the guaranteed error correction capability are then established based on the order of cage graphs. The results are extended to left-regular and right-uniform generalized LDPC codes. It is shown that this class of generalized LDPC codes can correct a linear number of worst case errors (in the code length) under the parallel bit flipping algorithm when the underlying Tanner graph is a good expander. A lower bound on the size of variable node sets which have the required expansion is established.