A 76-dBm IIP2 down-conversion mixer for TD-SCDMA/RFID applications
Analog Integrated Circuits and Signal Processing
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A 2.6 GHz Gilbert mixer-based downconverter RFIC is designed and implemented in a 0.15 µm InGaAs pseudomorphic high electron mobility transistor (pHEMT) foundry process. A crucial goal for the design is to achieve high input second-order intercept point (IIP2) that is required in a direct-conversion WiMAX receiver. The adaptive biasing at the switching stage of this downconverter is used to compensate the unbalance of the input LO signals for improving the IIP2. The technique presented here enhances the IIP2 by 18.8 dBm without at the expense of reducing the conversion gain.