Scheduling for input-queued packet switches by a re-configurable parallel match evaluator

  • Authors:
  • Spiridon F. Beldianu;Roberto Rojas-Cessa;Eiji Oki;Sotirios G. Ziavras

  • Affiliations:
  • Dept. of Elect. and Comp. Eng., New Jersey Institute of Technology, Newark, NJ;Dept. of Elect. and Comp. Eng., New Jersey Institute of Technology, Newark, NJ;Dept. of Inf. and Commun. Eng., The University of Electro-Communications, Tokyo, Japan;Dept. of Elect. and Comp. Eng., New Jersey Institute of Technology, Newark, NJ

  • Venue:
  • IEEE Communications Letters
  • Year:
  • 2010

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Abstract

A parallel match evaluator (PE) selects the most productive match for an input-queued (IQ) switch among several tested. However, current PE-based approaches use N fixed permutations out of possible N!, where N is the number of switch ports. A fixed permutation represents a permanent match between the inputs and outputs. To improve switching performance, this letter proposes a re-configurable PE (RPE) where permutations are selected according to traffic pattern, queue occupancy, or queuing times. This letter shows the performance improvement achieved with the proposed RPE.