The method for verifying software architecture with FSP model

  • Authors:
  • Jungho Kim

  • Affiliations:
  • SKC&C Inc., Seongnam-si, Gyeonggi-do, Korea

  • Venue:
  • ICACT'10 Proceedings of the 12th international conference on Advanced communication technology
  • Year:
  • 2010

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Abstract

C&C view of Software architecture is one of the modelling languages to describe and analyze runtime architecture of a software system. However, it is not sufficient to describe runtime architectural behaviours with only C&C view because C&C view architecture does not provide a sequence and state-chart of a software system. On the other side, we would use Finite State Process (FSP) model for describing behaviour and property of component in a software system. FSP model can be simple to show behavioural sequence and state of component. Moreover, we can check a property of a component with FSP model, once a FSP model of a software system is given. In this thesis, we propose an approach to model and verify C&C view architecture for a software system. Additionally, in using FSP model, the requirements represented using the FSP properties can be automatically checked against the C&C view architecture with a Labeled Transition Systems Analyzer (LTSA). This approach can support early detection of system's behaviour errors automatically.