A 3.3 V 72.2 Mbit/s 802.11n WLAN transformer-based power amplifier in 65 nm CMOS

  • Authors:

  • Jonas Fritzin;Atila Alvandpour

  • Affiliations:

  • Division of Electronic Devices, Department of Electrical Engineering, Linköping University, Linköping, Sweden 581 83;Division of Electronic Devices, Department of Electrical Engineering, Linköping University, Linköping, Sweden 581 83

  • Venue:
  • Analog Integrated Circuits and Signal Processing
  • Year:
  • 2010

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Abstract

This paper describes the design of a power amplifier (PA) for 802.11n WLAN fabricated in 65 nm CMOS technology. The PA utilizes 3.3 V thick gate oxide (5.2 nm) transistors and a two-stage differential configuration with integrated transformers for input and interstage matching. A methodology used to extract the layout parasitics from electromagnetic (EM) simulations is described. For a 72.2 Mbit/s, 64-QAM, 802.11n OFDM signal at an average and peak output power of 11.6 and 19.6 dBm, respectively, the measured EVM is 3.8%. The PA meets the spectral mask up to an average output power of 17 dBm.