Overcoming power/information tradeoffs in neural signal acquisition

Authors:
Stephen O'Driscoll;Teresa H. Meng
Affiliations:
Department of Electrical and Computer Engineering, University of California, Davis, CA;Department of Electrical Engineering, Stanford University, Stanford, CA
Venue:
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
Year:
2009

Citing 2
Cited 0

Latent variable models for neural data analysis

Latent variable models for neural data analysis
Design and Testing of an Integrated Circuit for Multi-Electrode Neural Recording

VLSID '07 Proceedings of the 20th International Conference on VLSI Design held jointly with 6th International Conference: Embedded Systems

Quantified Score

Hi-index	0.00

Visualization

Abstract

This paper describes the power cost of high-resolution ADC arrays for neural signal acquisition, discusses techniques to estimate optimal ADC resolutions based on spike sorting and presents an adaptive resolution ADC array for an implantable prosthetic processor. A 100kS/s SAR ADC whose resolution can be varied from 3 to 8-bits with corresponding power consumption of 0.23µW to 0.90µW has been implemented in 0.13µm CMOS. Adaptation of ADC resolutions according to neural data content reduces power consumption by a factor of 2.3 whilst maintaining an effective 7.8-bit resolution.