Double gate nanoscale MOSFET modeling by a neural network approach

Authors:
P. Suresh;L. Sheela
Affiliations:
M.E Embedded Systems, Anna University Tirunelveli, Tirunelveli, TamilNadu, India;Faculty of Electrical Engineering, Anna University Tirunelveli, Tirunelveli, TamilNadu, India
Venue:
MINO'10 Proceedings of the 9th WSEAS international conference on Microelectronics, nanoelectronics, optoelectronics
Year:
2010

Citing 2
Cited 0

Neural network design

Neural network design
A Low-Voltage Wide-Swing Programmable-Gain Current Amplifier

Analog Integrated Circuits and Signal Processing

Quantified Score

Hi-index	0.00

Visualization

Abstract

The use of independently-driven nano-scale double gate (DG) MOSFETs for low-power analog circuits is emphasized and illustrated. In independent drive configuration, the top gate response of DG-MOSFETs can be altered by application of a control voltage on the bottom gate. This paper presents modeling of nanometer Double Gate (DG) MOSFET by a neural network approach. The principle of this approach is firstly introduced and its application in modeling DC and conductance characteristics of nano-DG MOSFET is demonstrated in details. It is shown that this approach does not need parameter extraction routine while its prediction of the transistor performance has a small relative error within 1% compared with measure data, thus its result is as accurate as that BSIM model.