The PVM concurrent computing system: evolution, experiences, and trends
Parallel Computing - Special issue: message passing interfaces
Optimal prefetching and caching for parallel I/O sytems
Proceedings of the thirteenth annual ACM symposium on Parallel algorithms and architectures
Proceedings of the 2001 ACM/IEEE conference on Supercomputing
Proceedings of the 11 IPPS/SPDP'99 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing
Integrated prefetching and caching in single and parallel disk systems
Proceedings of the fifteenth annual ACM symposium on Parallel algorithms and architectures
CAR: Clock with Adaptive Replacement
FAST '04 Proceedings of the 3rd USENIX Conference on File and Storage Technologies
Introduction to the cell multiprocessor
IBM Journal of Research and Development - POWER5 and packaging
EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
MapReduce: simplified data processing on large clusters
OSDI'04 Proceedings of the 6th conference on Symposium on Opearting Systems Design & Implementation - Volume 6
Program-counter-based pattern classification in buffer caching
OSDI'04 Proceedings of the 6th conference on Symposium on Opearting Systems Design & Implementation - Volume 6
Exploring weak scalability for FEM calculations on a GPU-enhanced cluster
Parallel Computing
Evaluating MapReduce for Multi-core and Multiprocessor Systems
HPCA '07 Proceedings of the 2007 IEEE 13th International Symposium on High Performance Computer Architecture
Cell broadband engine architecture and its first implementation: a performance view
IBM Journal of Research and Development
Merge: a programming model for heterogeneous multi-core systems
Proceedings of the 13th international conference on Architectural support for programming languages and operating systems
Dma-based prefetching for i/o-intensive workloads on the cell architecture
Proceedings of the 5th conference on Computing frontiers
Entering the petaflop era: the architecture and performance of Roadrunner
Proceedings of the 2008 ACM/IEEE conference on Supercomputing
CellMR: A framework for supporting mapreduce on asymmetric cell-based clusters
IPDPS '09 Proceedings of the 2009 IEEE International Symposium on Parallel&Distributed Processing
Improving MapReduce performance in heterogeneous environments
OSDI'08 Proceedings of the 8th USENIX conference on Operating systems design and implementation
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In this research, we investigate and address the challenges of asymmetry in High-End Computing (HEC) systems comprising heterogeneous architectures with varying I/O and computation capacities. We focus on developing a flexible, scalable and easy-to-use programming model that automatically adapts to the capabilities of the system resources on largescale asymmetric clusters. Furthermore, we aim to develop innovative and efficient workload distribution techniques that bridge the asymmetry between system components. In particular, we intent to design tools and technologies that enable quick and efficient utilization of high-end asymmetric clusters in large-scale settings for modern scientific and enterprise computing.