Variable block size motion estimation architecture with a fast bottom-up decision mode and an integrated motion compensation targeting the H.264/AVC video coding standard

Authors:
Robson S.S. Dornelles;Felipe M. Sampaio;Luciano V. Agostini
Affiliations:
Federal University of Pelotas, Pelotas, Brazil;Federal University of Pelotas, Pelotas, Brazil;Federal University of Pelotas, Pelotas, Brazil
Venue:
SBCCI '10 Proceedings of the 23rd symposium on Integrated circuits and system design
Year:
2010

Citing 4
Cited 2

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An efficient memory hierarchy for full search motion estimation on high definition digital videos

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Abstract

This work presents a new algorithm for the H.264/AVC Variable Block Size Motion Estimation (VBSME) Decision Mode, which uses a bottom-up approach to merge the 4x4 motion vectors into larger-block predicted vectors. This work also presents a low cost architecture for the VBSME with an Integrated Motion Compensation that implements our decision mode algorithm. This architecture reduces the number of accesses to the encoder main memory, since the Motion Compensation module does not access the main memory in our solution. The architecture also presents the best trade-off between cost and throughput among the related works. This is important since this is a simplified low cost solution for the Inter Frame prediction, the most complex hardware module of the H.264/AVC video encoder.