Evaluating the manufacturing capability of a lithographic area by using a novel vague GERT

  • Authors:
  • Chia-Nan Wang;Gino K. Yang;Kuo-Chen Hung;Kuei-Hu Chang;Peter Chu

  • Affiliations:
  • Department of Industrial Engineering and Management, National Kaohsiung University of Applied Sciences, Kaohsiung 807, Taiwan;Department of Computer Science and Information Management, Hungkuang University, Taichung 433, Taiwan;Department of Logistics Management, National Defense University, Taipei 112, Taiwan;Department of Management Sciences, R.O.C. Military Academy, Kaohsiung 830, Taiwan;Department of Traffic Science, Central Police University, Taoyuan 333, Taiwan

  • Venue:
  • Expert Systems with Applications: An International Journal
  • Year:
  • 2011

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Abstract

This study proposes a novel vague graphical evaluation and review technique (GERT) for evaluating wafer manufacturing yield and finishing time in lithographic area. Wafer manufacturing reparability in lithographic area often requires reentry operations. Besides, many manufacturing steps, variable products, and flows can cause many difficulties and uncertainties. Hence, lithographic area is always the bottleneck in wafer fab manufacturing procedures. The main purpose of this study is to resolve the reentry problem in wafer manufacturing by GERT, and to solve the uncertainty problem by using vague set. Based on the manufacturing procedure of lithographic area in the 300mm wafer fab, the algorithm steps for vague GERT are proposed, and a simple decision support system is developed to process the complex calculation procedure for providing more information to managers. We also hope to enhance the capability of lithographic area in order to improve overall system performance.