Interconnect and lumped elements modeling in interior penalty discontinuous Galerkin time-domain methods

  • Authors:

  • Stylianos Dosopoulos;Jin-Fa Lee

  • Affiliations:

  • ElectroScience Laboratory, The Ohio State University, 1320 Kinnear Road, Columbus, OH 43212, USA;ElectroScience Laboratory, The Ohio State University, 1320 Kinnear Road, Columbus, OH 43212, USA

  • Venue:
  • Journal of Computational Physics
  • Year:
  • 2010

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Abstract

In this paper, we present an approach on how to incorporate passive lumped elements such as resistors, capacitors and inductors in DGTD methods and their application to interconnect modeling. Starting from the voltage and current relationships, we derive the equivalent relationships that describe each of the R, L, C in terms of the electric and magnetic fields. Next, these field expressions are weakly enforced through the Interior Penalty (IP) DG formulation. The proposed method is explicit and conditionally stable. Additionally, a local time-stepping strategy is applied to increase efficiency and reduce the computational time. Finally, a numerical example is presented to validate the proposed approach.