Majority-based tracking forecast memories for stochastic LDPC decoding

  • Authors:

  • Saeed Sharifi Tehrani;Ali Naderi;Guy-Armand Kamendje;Saied Hemati;Shie Mannor;Warren J. Gross

  • Affiliations:

  • Department of the Electrical and Computer Engineering, McGill University, Montreal, QC, Canada;Department of the Electrical and Computer Engineering, McGill University, Montreal, QC, Canada;Department of the Electrical and Computer Engineering, McGill University, Montreal, QC, Canada;Department of the Electrical and Computer Engineering, McGill University, Montreal, QC, Canada;Department of the Electrical and Computer Engineering, McGill University, Montreal, QC, Canada and Department of the Electrical and Computer Engineering at the Technion-Israel Institute of Technol ...;Department of the Electrical and Computer Engineering, McGill University, Montreal, QC, Canada

  • Venue:
  • IEEE Transactions on Signal Processing
  • Year:
  • 2010

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Abstract

This paper proposes majority-based tracking forecast memories (MTFMs) for area efficient high throughput ASIC implementation of stochastic Low-Density Parity-Check (LDPC) decoders. The proposed method is applied for ASIC implementation of a fully parallel stochastic decoder that decodes the (2048, 1723) LDPC code from the IEEE 802.3an (10GBASE-T) standard. The decoder occupies a silicon core area of 6.38 mm2 in CMOS 90 nm technology, achieves a maximum clock frequency of 500 MHz, and provides a maximum core throughput of 61.3 Gb/s. The decoder also has good decoding performance and error-floor behavior and provides a bit error rate (BER) of about 4 × 10-13 at Eb/No = 5.15 dB. To the best of our knowledge, the implemented decoder is the most area efficient fully parallel soft-decision LDPC decoder reported in the literature.