A generic architecture of CCSDS low density parity check decoder for near-earth applications

  • Authors:
  • Fabien Demangel;Nicolas Fau;Nicolas Drabik;François Charot;Christophe Wolinski

  • Affiliations:
  • R-interface, Marseille Cedex, France;R-interface, Marseille Cedex, France;R-interface, Marseille Cedex, France;Inria University of Rennes, Rennes Cedex, France;Inria University of Rennes, Rennes Cedex, France

  • Venue:
  • Proceedings of the Conference on Design, Automation and Test in Europe
  • Year:
  • 2009

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Abstract

Low Density Parity Check (LDPC) codes have recently been chosen in the CCSDS standard for uses in near-earth applications. The specified code belongs to the class of Quasi-Cyclic LDPC codes which provide very high data rates and high reliability. Even if these codes are suited to high data rate, the complexity of LDPC decoding is a real challenge for hardware engineers. This paper presents a generic architecture for a CCSDS LDPC decoder. This architecture uses the regularity and the parallelism of the code and a genericity based on an optimized storage of the data. Two FPGA implementations are proposed: the first one is low-cost oriented and the second one targets high-speed decoder.