A low-power high-data-rate ASK IF receiver with a digital-control AGC loop

Authors:
Xiaoman Wang;Baoyong Chi;Zhihua Wang
Affiliations:
Institute of Microelectronics, Tsinghua University, Beijing, China;Institute of Microelectronics, Tsinghua University, Beijing, China;Institute of Microelectronics, Tsinghua University, Beijing, China
Venue:
IEEE Transactions on Circuits and Systems II: Express Briefs
Year:
2010

Citing 2
Cited 2

The Design and Analysis of Computer Algorithms

The Design and Analysis of Computer Algorithms
A fast-settling wideband-IF ASK baseband circuit for a wireless endoscope capsule

IEEE Transactions on Circuits and Systems II: Express Briefs

Feed-forward Output Swing Prediction AGC design with Parallel-Detect Singular-Store Peak Detector

Microelectronics Journal
A feed-forward AGC circuit with 48 dB-gain range, 1.2 μs minimum settling time for WiMAX receiver

Analog Integrated Circuits and Signal Processing

Quantified Score

Hi-index	0.00

Visualization

Abstract

A low-power high-data-rate ASK IF receiver is proposed. It consists of one digital-control automatic-gain-control (AGC) loop and an ASK detector. By utilizing the scrambler concept in the digital communication systems, the gain of the programmable-gain amplifier (PGA) in the AGC loop is discretely adjusted by a gain-control block to eliminate the multidigit analog-to-digital converter. Due to the high sensitivity of the ASK detector, a large controllable input range can be obtained in the AGC loop. The ASK IF receiver has been implemented in 0.18-µm CMOS, and the overall current consumption is 1.21 mA with a supply voltage of 1.8 V. The ASK receiver achieves a 2-Mb/s data rate with an IF carrier frequency of 10 MHz, and an input signal amplitude ranges from 180 µV to 900 m V.