Accuracy of the Discrete Fourier Transform and the Fast Fourier Transform
SIAM Journal on Scientific Computing
LogP: a practical model of parallel computation
Communications of the ACM
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware
Not multi-, but many-core: designing integral parallel architectures for embedded computation
ACM SIGARCH Computer Architecture News - Special issue: ALPS '07---advanced low power systems
High performance discrete Fourier transforms on graphics processors
Proceedings of the 2008 ACM/IEEE conference on Supercomputing
Fast Fourier Transforms: for fun and profit
AFIPS '66 (Fall) Proceedings of the November 7-10, 1966, fall joint computer conference
Integral Parallel Architecture & Berkeley's Motifs
ASAP '09 Proceedings of the 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors
The Connex Array™ as a neural network accelerator
CI '07 Proceedings of the Third IASTED International Conference on Computational Intelligence
Toward Energy-Efficient Computing
Queue - Chip Design
Journal of Signal Processing Systems
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We present novel implementations of the Fast Fourier Transform on the massively parallel Connex Array™(CA) circuit. The estimated performance is 19 GFlops (BenchFFT metric) of parallel computing 64 FFTs of size 1024, using 5 Watts. We compare the CA and NVIDIA's GTX 285 GPU performance. The CA is not a direct NVIDIA competitor, targeting a different application area. Considering its low power dissipation, the CA is a good solution for low cost mobile computing equipment, video processing, and multi-channel high-sampling audio processing.