Design patterns: elements of reusable object-oriented software
Design patterns: elements of reusable object-oriented software
Local Reasoning about Programs that Alter Data Structures
CSL '01 Proceedings of the 15th International Workshop on Computer Science Logic
Transition predicate abstraction and fair termination
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Modular invariants for layered object structures
Science of Computer Programming - Special issue on source code analysis and manipulation (SCAM 2005)
Towards imperative modules: reasoning about invariants and sharing of mutable state
Theoretical Computer Science - Components and objects
Information Hiding and Visibility in Interface Specifications
ICSE '07 Proceedings of the 29th international conference on Software Engineering
Specification and verification challenges for sequential object-oriented programs
Formal Aspects of Computing
The Spec# Programming System: Challenges and Directions
Verified Software: Theories, Tools, Experiments
Regional Logic for Local Reasoning about Global Invariants
ECOOP '08 Proceedings of the 22nd European conference on Object-Oriented Programming
Boogie Meets Regions: A Verification Experience Report
VSTTE '08 Proceedings of the 2nd international conference on Verified Software: Theories, Tools, Experiments
Reasoning about comprehensions with first-order SMT solvers
Proceedings of the 2009 ACM symposium on Applied Computing
Implicit Dynamic Frames: Combining Dynamic Frames and Separation Logic
Genoa Proceedings of the 23rd European Conference on ECOOP 2009 --- Object-Oriented Programming
TACAS'08/ETAPS'08 Proceedings of the Theory and practice of software, 14th international conference on Tools and algorithms for the construction and analysis of systems
An automatic verifier for Java-like programs based on dynamic frames
FASE'08/ETAPS'08 Proceedings of the Theory and practice of software, 11th international conference on Fundamental approaches to software engineering
Dafny: an automatic program verifier for functional correctness
LPAR'10 Proceedings of the 16th international conference on Logic for programming, artificial intelligence, and reasoning
Considerate reasoning and the composite design pattern
VMCAI'10 Proceedings of the 11th international conference on Verification, Model Checking, and Abstract Interpretation
Dynamic frames: support for framing, dependencies and sharing without restrictions
FM'06 Proceedings of the 14th international conference on Formal Methods
ESOP'10 Proceedings of the 19th European conference on Programming Languages and Systems
A polymorphic intermediate verification language: design and logical encoding
TACAS'10 Proceedings of the 16th international conference on Tools and Algorithms for the Construction and Analysis of Systems
ACM Transactions on Programming Languages and Systems (TOPLAS)
Decision procedures for region logic
VMCAI'12 Proceedings of the 13th international conference on Verification, Model Checking, and Abstract Interpretation
Separation predicates: a taste of separation logic in first-order logic
ICFEM'12 Proceedings of the 14th international conference on Formal Engineering Methods: formal methods and software engineering
Local Reasoning for Global Invariants, Part II: Dynamic Boundaries
Journal of the ACM (JACM)
Local Reasoning for Global Invariants, Part I: Region Logic
Journal of the ACM (JACM)
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The Composite design pattern is an exemplar of specification and verification challenges for sequential object-oriented programs. Region logic is a Hoare logic augmented with state dependent "modifies" specifications based on simple notations for object sets. Using ordinary first order logic assertions, it supports local reasoning and also the hiding of invariants on encapsulated state, in ways similar to separation logic but suited to off-the-shelf SMT solvers. This paper uses region logic to specify and verify a representative implementation of the Composite design pattern. To evaluate efficacy of the specification, it is used in verifications of several sample client programs including one with hiding. Verification is performed using a verifier for region logic built on top of an existing verification condition generator which serves as a front end to an SMT solver.