The performance of multilective VLSI algorithms
Journal of Computer and System Sciences
On the planar monotone computation of threshold functions
Proceedings on STACS 85 2nd annual symposium on theoretical aspects of computer science
On the planar monotone computation of boolean functions
Theoretical Computer Science
Monotone circuits for connectivity require super-logarithmic depth
STOC '88 Proceedings of the twentieth annual ACM symposium on Theory of computing
Monotone circuits for matching require linear depth
STOC '90 Proceedings of the twenty-second annual ACM symposium on Theory of computing
Limiting negations in constant depth circuits
SIAM Journal on Computing
On the Inversion Complexity of a System of Functions
Journal of the ACM (JACM)
Introduction to Circuit Complexity: A Uniform Approach
Introduction to Circuit Complexity: A Uniform Approach
Hauptvortrag: The complexity of negation-limited networks - A brief survey
Proceedings of the 2nd GI Conference on Automata Theory and Formal Languages
COCO '99 Proceedings of the Fourteenth Annual IEEE Conference on Computational Complexity
Simulating Quantum Computation by Contracting Tensor Networks
SIAM Journal on Computing
Upper Bounds for Monotone Planar Circuit Value and Variants
Computational Complexity
Balancing bounded treewidth circuits
CSR'10 Proceedings of the 5th international conference on Computer Science: theory and Applications
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The decrease of a Boolean function f: {0, 1}n → {0, 1}, denoted by d(f) is the maximum number of inverse indices in any increasing chain of inputs x1,..., xl ∈ {0,1}n, where i is an inverse index if f(xi) f(xi+1). It follows from a theorem of Markov (JACM 1958) that the minimum number of negation gates in a circuit necessary and sufficient to compute any Boolean function f is ⌈log(d(f) + 1)⌉. A recent result due to Morizumi (ICALP 2009) proves that d(f) negations are necessary and sufficient when the computation is done by formulas. We explore the situation in between formulas (directed trees) and general circuits (DAGs), and related models. We obtain the following results: 1. We argue that for any Boolean function f, there is a circuit computing f, that uses ⌈log(d(f) + 1)⌉ negations and has treewidth at most ⌈log(d(f)+1)⌉ + 1. For 1 ≤ k ≤ ⌈log(d(f)+1)⌉, we prove that d(f). 8k/2k negations are sufficient to compute any Boolean function f by circuits of treewidth at most k. Moreover, if there is a circuit family of size s = s(n) and treewidth k = k(n) computing {fn}, then there exists a circuit family of size sċnO(1)ċ2O(min{k, log n}) and treewidth at most 2k which computes {fn} and contains O(max{nk/22k, log n}) negation gates. 2. We obtain tight bounds on the number of negation gates required to compute specific functions such as PARITYn, PARITYn and INVERTERn by one-input-face upward planar circuits. We extend these lower bounds to a larger class of functions (which also includes natural functions like ADD and SUBTRACT) and we show a direct sum theorem for this class with respect to the number of negations. 3. We demonstrate the limitations of the one-input-face constraint in the upward planar circuits by showing the explicit function which can be computed by a monotone upward planar circuit, but cannot be computed by any montone one-input-face upward planar circuit. 4. We prove that for every Boolean function f, there exists a multi-lective upward planar circuit which uses at most ⌈d(f)+1/2⌉ negation gates for computing f.