Using data postcompensation and predistortion to tolerate cell-to-cell interference in MLC NAND flash memory

Authors:
Guiqiang Dong;Shu Li;Tong Zhang
Affiliations:
Department of Electrical, Computer, and Systems Engineering, Rensselaer Polytechnic Institute, Troy, NY;Marvell Semiconductor, Inc., Sunnyvale, CA;Department of Electrical, Computer, and Systems Engineering, Rensselaer Polytechnic Institute, Troy, NY
Venue:
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Year:
2010

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Abstract

With the appealing storage-density advantage, multilevel-per-cell (MLC) NAND Flash memory that stores more than 1 bit in each memory cell now largely dominates the global Flash memory market. However, due to the inherent smaller noise margin, the MLC NAND Flash memory is more subject to various device/circuit variability and noise, particularly as the industry is pushing the limit of technology scaling and a more aggressive use of MLC storage. Cell-to-cell interference has been well recognized as a major noise source responsible for raw-memory-storage reliability degradation. Leveraging the fact that cell-to-cell interference is a deterministic data-dependent process and can be mathematically described with a simple formula, we present two simple yet effective data-processing techniques that can well tolerate significant cell-to-cell interference at the system level. These two techniques essentially originate from two signal-processing techniques being widely used in digital communication systems to compensate communication-channel intersymbol interference. The effectiveness of these two techniques have been well demonstrated through computer simulations and analysis under an information theoretical framework, and the involved design tradeoffs are discussed in detail.