Performance characteristics of OpenMP language constructs on a many-core-on-a-chip architecture

  • Authors:

  • Weirong Zhu;Juan Del Cuvillo;Guang R. Gao

  • Affiliations:

  • Department of Electrical and Computer Engineering, University of Delaware, Newark, Delaware;Department of Electrical and Computer Engineering, University of Delaware, Newark, Delaware;Department of Electrical and Computer Engineering, University of Delaware, Newark, Delaware

  • Venue:
  • IWOMP'05/IWOMP'06 Proceedings of the 2005 and 2006 international conference on OpenMP shared memory parallel programming
  • Year:
  • 2005

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Abstract

Recent emerging many-core-on-a-chip architectures present massive on-chip parallelism through hardware support for multithreading. In order to achieve fast development of parallel applications that exploit this massive intra-chip parallelism to achieve highly sustainable performance, suitable programming models are needed. OpenMP, the industry de facto standard for writing parallel programs on shared memory systems, could become a reasonable candidate. To increase our understanding of the behavior and performance characteristics of OpenMP programs on many-core-on-a-chip architectures, this paper presents a performance study of basic OpenMP language constructs on the IBM Cyclops- 64 architecture, which consists of 160 hardware thread units in a single chip. Compared with previous work on conventional SMP systems [1], the overhead of OpenMP language constructs on C64 many-core architecture is at least one order of magnitude lower.