Linearizability: a correctness condition for concurrent objects
ACM Transactions on Programming Languages and Systems (TOPLAS)
ACM Transactions on Programming Languages and Systems (TOPLAS)
Mermera: non-coherent distributed shared memory for parallel computing
Mermera: non-coherent distributed shared memory for parallel computing
Sequential consistency versus linearizability
ACM Transactions on Computer Systems (TOCS)
Designing memory consistency models for shared-memory multiprocessors
Designing memory consistency models for shared-memory multiprocessors
An adaptive causal ordering algorithm suited to mobile computing environments
Journal of Parallel and Distributed Computing
Implementing sequentially consistent shared objects using broadcast and point-to-point communication
Journal of the ACM (JACM)
How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs
IEEE Transactions on Computers
On the interconnection of causal memory systems
Journal of Parallel and Distributed Computing
Reconfigurable Sequential Consistency Algorithm
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04
Reconfigurable Object Consistency Model
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 8 - Volume 09
Reconfigurable Consistency Algorithm
HPCASIA '05 Proceedings of the Eighth International Conference on High-Performance Computing in Asia-Pacific Region
Reconfigurable object consistency model for distributed shared memory
ISPA'05 Proceedings of the Third international conference on Parallel and Distributed Processing and Applications
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In this paper we present an algorithm that can be used to implement sequential, causal, or cache consistency in distributed shared memory (DSM) systems. For this purpose it has a parameter that allows to choose the consistency model to be implemented. As far as we know, this is the first algorithm proposed that implements cache coherence. In our algorithm, when implementing causal and cache consistency all read and write operations are executed locally (i.e., are fast). It is known that no sequential algorithm has only fast memory operations. However, in our algorithm, when implementing sequential consistency all write operations and some read operations are fast. The algorithm uses propagation and full replication, where values written by a process are propagated to the rest of processes. It works in a cyclic turn fashion, with each process of the DSM system broadcasting one message in its turn. The values written by the process are sent in the message (instead of sending one message for each write operation), but unnecessary values are excluded. All this allows to control the amount of message traffic due to the algorithm.