Achieving 100% throughput in an input-queued switch

  • Authors:

  • Nick McKeown;Venkat Anantharam;Jean Walrand

  • Affiliations:

  • Department of Electrical Engineering, Stanford University, Stanford, CA;Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA;Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA

  • Venue:
  • INFOCOM'96 Proceedings of the Fifteenth annual joint conference of the IEEE computer and communications societies conference on The conference on computer communications - Volume 1
  • Year:
  • 1996

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Abstract

It is well known that head-of-line (HOL) blocking limits the throughput of an input-queued switch with FIFO queues. Under certain conditions, the throughput can be shown to be limited to approximately 58%. It is also known that if non-FIFO queueing policies are used, the throughput can be increased. However, it has not been previously shown that if a suitable queueing policy and scheduling algorithm are used then it is possible to achieve 100% throughput for all independent arrival processes. In this paper we prove this to be the case using a simple linear programming argument and quadratic Lyapunov function. In particular, we assume that each input maintains a separate FIFO queue for each output and that the switch is scheduled using a maximum weight bipartite matching algorithm.