ATM multiplexers and output port controllers with distributed control and flexible queueing disciplines

Authors:
K. L. Eddie Law;A. Leon-Garcia
Affiliations:
BNR Ltd., Ottawa, Ontario, Canada and Department of Electrical and Computer Engineering, University of Toronto, Toronto, Canada;Department of Electrical and Computer Engineering, University of Toronto, Toronto, Canada
Venue:
INFOCOM'96 Proceedings of the Fifteenth annual joint conference of the IEEE computer and communications societies conference on The conference on computer communications - Volume 2
Year:
1996

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Abstract

In this paper, we present a novel design concept for constructing high-speed output port codrollers for ATM switches, and statistical multiplexers. The newly proposed concept provides an external framework in which the internal hardware designs can be modified to achieve a specific quality of service. Two distributed control designs are provided, namely the fully shared buger and partially shared bufler architectures. The fully shared buger architecture can provide the pushout mechanism or complete bufer sharirrg queueing discipline which gives the best loss and delay performances for incoming cell stream with static priority.