Speed and accuracy in digital network simulation based on structural modeling
DAC '82 Proceedings of the 19th Design Automation Conference
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This paper presents a methodology for fault-simulation of system level diagnostic programs involving large models (50,000 to 200,000 gates) and long test sequences. Accuracy of memory models, interplay of target faults with diagnostic program development and creation of shorter diagnostics are topics covered. It also details observation and statistical methods and tools used to investigate the operation of the faulty machine within the diagnostic program. Observation of individual faulty machines is critical to provide information about looping and erratic programs, violations to subprogram sequencing, etc. This methodology is an successful attempt to make fault simulation of system diagnostics feasible.