The Velox Transactional Memory Stack

  • Authors:
  • Yehuda Afek;Ulrich Drepper;Pascal Felber;Christof Fetzer;Vincent Gramoli;Michael Hohmuth;Etienne Riviere;Per Stenstrom;Osman Unsal;Walther Maldonado Moreira;Derin Harmanci;Patrick Marlier;Stephan Diestelhorst;Martin Pohlack;Adrian Cristal;Ibrahim Hur;Aleksandar Dragojevic;Rachid Guerraoui;Michal Kapalka;Sasa Tomic;Guy Korland;Nir Shavit;Martin Nowack;Torvald Riegel

  • Affiliations:
  • Tel Aviv University;Red Hat;University of Neuchatel;Technische Universitat Dresden;University of Neuchâtel;Advancd Micro Devices;University of Neuchatel;Chalmers University of Technology;Barcelona Supercomputing Center;University of Neuchatel;University of Neuchatel;University of Neuchatel;Advanced Micro Devices;Advanced Micro Devices;Barcelona Supercomputing Center;Barcelona Supercomputing Center;Ecole Polytechnique Federale de Lausanne;Ecole Polytechnique Federale de Lausanne;Ecole Polytechnique Federale de Lausanne;Universitat Politecnica de Catalunya;Tel Aviv University;Tel Aviv University;Technische Universitat Dresden;Technische Universitat Dresden

  • Venue:
  • IEEE Micro
  • Year:
  • 2010

Quantified Score

Hi-index 0.01

Visualization

Abstract

The adoption of multi- and many-core architectures for mainstream computing undoubtedly brings profound changes in the way software is developed. In particular, the use of fine grained locking as the multi-core programmer’s coordination methodology is considered by more and more experts as a dead-end. The transactional memory (TM) programming paradigm is a strong contender to become the approach of choice for replacing locks and implementing atomic operations in concurrent programming. Combining sequences of concurrent operations into atomic transactions allows a great reduction in the complexity of both programming and verification, by making parts of the code appear to execute sequentially without the need to program using fine-grained locking. Transactions remove from the programmer the burden of figuring out the interaction among concurrent operations that happen to conflict when accessing the same locations in memory. The EU-funded FP7 VELOX project designs, implements and evaluates an integrated TM stack, spanning from programming language to the hardware support, and including runtime and libraries, compilers, and application environments. This paper presents an overview of the VELOX TM stack and its associated challenges and contributions.