Analysis and Design of Analog Integrated Circuits
Analysis and Design of Analog Integrated Circuits
Silicon Optoelectronic Integrated Circuits (Springer Series in Advanced Microelectronics, 13)
Silicon Optoelectronic Integrated Circuits (Springer Series in Advanced Microelectronics, 13)
Broadband Opto-Electrical Receivers in Standard CMOS
Broadband Opto-Electrical Receivers in Standard CMOS
Design of Integrated Circuits for Optical Communications
Design of Integrated Circuits for Optical Communications
An adaptive equalizer with the capacitance multiplication for display port main link in 0.18-µm CMOS
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Giga-bit CMOS equalizers for high-speed data links
Analog Integrated Circuits and Signal Processing
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This paper presents an optical receiver with a monolithically integrated photodetector in 0.18-µm CMOS technology using a combination of spatially modulated light (SML) detection and an analog equalizer. A transimpedance amplifier employing negative Miller capacitance is introduced to increase its bandwidth without causing gain peaking. To provide sufficient reverse-bias voltage to the photodetector's p-n junction, the transimpedance amplifier is operated with a 3.3-V supply, while the rest of the circuit blocks is powered with a 1.8-V supply. The on-chip SML detector achieves a net responsivity of 0.052 A/W. Occupying a core area of 0.72 mm2, the fully integrated optical receiver achieves 4.25 and 5 Gbits/s with power consumption values of 144 and 183 mW, respectively.