Nevertrace claims for model checking

  • Authors:
  • Zhe Chen;Gilles Motet

  • Affiliations:
  • LATTIS & LAAS-CNRS, INSA, Université de Toulouse, Toulouse, France;LATTIS & LAAS-CNRS, INSA, Université de Toulouse, Toulouse, France

  • Venue:
  • SPIN'10 Proceedings of the 17th international SPIN conference on Model checking software
  • Year:
  • 2010

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Abstract

We propose the nevertrace claim, which is a new construct for specifying the correctness properties that either finite or infinite execution traces (i.e., sequences of transitions) that should never occur. In semantics, it is neither similar to never claim and trace assertion, nor a simple combination of them. Furthermore, the theoretical foundation for checking nevertrace claims, namely the Asynchronous-Composition Büchi Automaton Control System (AC-BAC System), is proposed. The major contributions of the nevertrace claim include: a powerful construct for formalizing properties related to transitions and their labels, and a way for reducing the state space at the design stage.