Performance analysis of reconfigurable processors using MVA analysis
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
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Traditional grid networks employ general purpose processors (GPPs) as their main processing elements. Incorporating reconfigurable processing elements in such networks can be a promising technology to increase their performance and flexibility. Many grid networks, such as Tera Grid, are already utilizing reconfigurable hardware resource as a processing element. In this paper, we propose queuing models for grid networks that incorporate the following processing elements: a GPP, a reconfigurable element (RE), and a hybrid element (combining a GPP with an RE). The proposed models are validated by taking average response time of these models as validation metric. The comparison of experimental (simulation) and analytical results suggest that the total average error is less than 3.5%.