The role of the computer architecture simulator in the laboratory
ACM SIGCSE Bulletin
A method for obtaining digital signatures and public-key cryptosystems
Communications of the ACM
CPU Sim 3.1: A tool for simulating computer architectures for computer organization classes
Journal on Educational Resources in Computing (JERIC)
Teaching computer organization/architecture with limited resources using simulators
SIGCSE '02 Proceedings of the 33rd SIGCSE technical symposium on Computer science education
A simulator for teaching computer architecture
ACM SIGCSE Bulletin
MARS: an education-oriented MIPS assembly language simulator
Proceedings of the 37th SIGCSE technical symposium on Computer science education
Teaching computer architecture/organisation using simulators
FIE '98 Proceedings of the 28th Annual Frontiers in Education - Volume 03
A simple machine simulator for teaching stack frames
Proceedings of the 41st ACM technical symposium on Computer science education
MyTuringTable: a teaching tool to accompany Turing's original paper on computability
Proceedings of the 17th ACM annual conference on Innovation and technology in computer science education
Green16: a frugal CPU architecture
Proceedings of the South African Institute for Computer Scientists and Information Technologists Conference
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In this paper, we describe a programmable emulator for the Princeton IAS/Von Neumann machine. The emulator is historically accurate, preserving the quirks and eccentricities of the machine. It is also user-friendly and robust, suitable for undergraduate architecture and programming classes as a teaching tool. Users can write non-trivial programs in IAS assembly code or machine code. We present some examples here, and discuss assignments from its first use in two undergraduate classes. IASSim is a Java application publicly available at no cost.