Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
Turbo codes: principles and applications
Turbo codes: principles and applications
Concatenated space-time block coding with trellis coded modulation in fading channels
IEEE Transactions on Wireless Communications
IEEE Transactions on Information Theory
IEEE Journal on Selected Areas in Communications
A simple transmit diversity technique for wireless communications
IEEE Journal on Selected Areas in Communications
Space-time block coding for wireless communications: performance results
IEEE Journal on Selected Areas in Communications
Full rate space-time turbo codes
IEEE Journal on Selected Areas in Communications
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Recent studies have shown that using space-time code is an effective approach to increase the data rate over wireless channels. Space-time turbo (ST-Turbo) codes formed by concatenating space-time codes with turbo codes, take advantage of both the high diversity order of space-time systems and the randomness of the turbo codes. In this paper, we compare two ST-Turbo codes, i.e., simple space-time turbo codes (SiSTT) and turbo trellis-coded modulation space-time block codes (TTCM-STBCs), and their approximate versions with respect to performance and energy consumption for both general-purpose processor and synthesized implementations. The approximations are aimed at reducing the computational complexity and include reduction in the number of paths, number of iterations, and datapath computations. Analysis of the simulation results show that SiSTT-based versions should be used for higher SNR applications where low energy consumption is the primary design objective, and TTCM-STBC-based versions should be used where performance is the primary design objective. Finally, four ST-Turbo algorithms (i.e., baseline SiSTT and its energy-efficient approximate version and the baseline TTCM-STBC and its energy-efficient approximate version) have been synthesized in 0.18-µm CMOS technology and the implementations compared with respect to area, power, and latency.