DTMOS technique for low-voltage analog circuits

  • Authors:
  • Mohammad Maymandi-Nejad;Manoj Sachdev

  • Affiliations:
  • Electrical Engineering Department, Ferdowsi University of Mashhad, Mashhad, Iran;Electrical and Computer Engineering Department, University of Waterloo, Waterloo, ON, Canada

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2006

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Abstract

In this paper, the application of dynamic threshold MOS (DTMOS) technique for low-voltage analog circuits is explored. The body terminal of PMOS transistors in bulk CMOS technology can be used as the forth terminal to enhance the performance of low-voltage analog circuits. To show the effectiveness of this technique, we have designed a continuous time common mode feedback (CMFB) circuit for a sub 1-V opamp and a new sub 1-V, 1-bit quantizer. A 0.8-V opamp with embedded CMFB and a 0.8-V, 1-bit quantizer for low-voltage ΔΣ modulators are implemented in 0.18- µm CMOS technology. The simulation results as well as the measurement data of these blocks are presented in this paper.