Design of a reconfigurable pseudorandom number generator for use in intelligent systems

  • Authors:
  • Tiago de Oliveira;Norian Marranghello

  • Affiliations:
  • Federal University at São Paulo, Department of Science and Technology, Rua Talim, 330, Vila Nair, 12.231-280 São José dos Campos, SP, Brazil;São Paulo State University, Department of Computer Science, Rua Cristóvão Colombo, 2265, 15.054-000 São José do Rio Preto, SP, Brazil

  • Venue:
  • Neurocomputing
  • Year:
  • 2011

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Abstract

This paper deals with the design of a network-on-chip reconfigurable pseudorandom number generation unit that can map and execute meta-heuristic algorithms in hardware. The unit can be configured to implement one of the following five linear generator algorithms: a multiplicative congruential, a mixed congruential, a standard multiple recursive, a mixed multiple recursive, and a multiply-with-carry. The generation unit can be used both as a pseudorandom and a message passing-based server, which is able to produce pseudorandom numbers on demand, sending them to the network-on-chip blocks that originate the service request. The generator architecture has been mapped to a field programmable gate array, and showed that millions of numbers in 32-, 64-, 96-, or 128-bit formats can be produced in tens of milliseconds.