A low-dropout voltage regulator with active current amplifier frequency compensation

  • Authors:

  • Ke Zhang;Wenhong Li;Ran Liu

  • Affiliations:

  • State Key Laboratory of ASIC and System, Fudan University, Shanghai, People's Republic of China;State Key Laboratory of ASIC and System, Fudan University, Shanghai, People's Republic of China;State Key Laboratory of ASIC and System, Fudan University, Shanghai, People's Republic of China

  • Venue:
  • International Journal of Circuit Theory and Applications
  • Year:
  • 2011

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Abstract

This paper presents a new compensation scheme of low-dropout regulator (LDO) design over the conventional methodology. With only 0.3 pF on-chip compensation capacitor, a left-half-plane zero is realized within the regulation loop unity-gain bandwidth and over 56 ∘ phase margin is achieved under the full range of the load current. The LDO thus achieves stability without using the equivalent series resistance of the capacitor. It is proven experimentally that the proposed LDO has many attractive features such as high accuracy, low quiescent current, and smaller compensation capacitor. The measurement results show that the excellent performance can be comparable with the state of the art LDOs. Copyright © 2010 John Wiley & Sons, Ltd.