CMOS instrumentation amplifier with offset cancellation circuitry for biomedical application

Authors:
F. Mohd-Yasin;M. T. Yap;M. B. I. Reaz
Affiliations:
Faculty of Engineering, Multimedia University, Cyberjaya, Selangor, Malaysia;Faculty of Engineering, Multimedia University, Cyberjaya, Selangor, Malaysia;Dept. of Electrical and Computer Engineering, International Islamic University Malaysia, Kuala Lumpur, Malaysia
Venue:
ICOSSE'06 Proceedings of the 5th WSEAS international conference on System science and simulation in engineering
Year:
2006

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Abstract

This paper presents the design and development of a CMOS Instrumentation Amplifier for biomedical application. This design manages to achieve 101dB gain, PSRR 102dB and 91dB CMRR. The final circuit consumes total of 0.318µWatts power at 1.8V supply voltage and possesses die size of 9.6nm2 area. It also has a full CMOS implementation of offset cancellation circuitry, among the first of its kind. Comparison with more complex work shows improved or comparable results.