Design and FPGA Implementation of Linear FIR Low-pass Filter Based on Kaiser Window Function

Authors:
Gao Jinding;Hou Yubao;Su Long
Affiliations:
-;-;-
Venue:
ICICTA '11 Proceedings of the 2011 Fourth International Conference on Intelligent Computation Technology and Automation - Volume 02
Year:
2011

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Natural Computing: an international journal

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Abstract

Aiming at the requirements of real time signal processing, a cut-off frequency of 100 KHz, 16-tap direct form FIR linear-phase low-pass filter using Kaiser Window function was designed out based on DSP Builder system modeling approach. The signal waveforms in time domain and frequency domain before and after filtering were analyzed. Ultimately, a highest response frequency of 61.71MHz high-speed FIR low-pass filter was implemented on EP2C35F672C8 FPGA. Design efficiency and filter performance has been greatly improved.