Overview of SMMS-SoC architecture

  • Authors:

  • S. Natarajan;N. Ramadass;J. Raja Paul Perinbam

  • Affiliations:

  • Embedded System Design Laboratory, Department of Electronics and Communication Engineering, College of Engineering, Anna University;Embedded System Design Laboratory, Department of Electronics and Communication Engineering, College of Engineering, Anna University;Embedded System Design Laboratory, Department of Electronics and Communication Engineering, College of Engineering, Anna University

  • Venue:
  • AEE'05 Proceedings of the 4th WSEAS international conference on Applications of electrical engineering
  • Year:
  • 2005

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Abstract

This paper proposes a Self-Modifiable Mixed-Signal System-on-Chip (SMMS-SoC) architecture modifiable at the transistor level. SMMS-SoC allows configuration modification in both analog and digital domain. Current programmable devices, in particular the field programmable gate arrays and field programmable analog arrays, lack dynamic self-modification property. These field programmable devices are reconfigurable only by an off-chip processor core, which is not suitable for tightly-coupled embedded systems. The idea behind self-modification method is to extend the scheduler characteristics from real-time operating system (RTOS) to hardware domain that considers module dependencies, module precedence constraints and response time deadlines, and provides solution configurations as to which block must be modified, which module must be implemented next in any block and at which time instant. Simulations are performed on this architecture and currently it is under refinement and test at Anna University.