Theoretical Computer Science
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
TAXYS: A Tool for the Development and Verification of Real-Time Embedded Systems
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Creol: a type-safe object-oriented model for distributed concurrent systems
Theoretical Computer Science - Components and objects
Task automata: Schedulability, decidability and undecidability
Information and Computation
Schedulability and Compatibility of Real Time Asynchronous Objects
RTSS '08 Proceedings of the 2008 Real-Time Systems Symposium
Modeling and Analysis of Thread-Pools in an Industrial Communication Platform
ICFEM '09 Proceedings of the 11th International Conference on Formal Engineering Methods: Formal Methods and Software Engineering
Schedulability analysis using two clocks
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Multi-processor schedulability analysis of preemptive real-time tasks with variable execution times
FORMATS'07 Proceedings of the 5th international conference on Formal modeling and analysis of timed systems
Modular schedulability analysis of concurrent objects in creol
FSEN'09 Proceedings of the Third IPM international conference on Fundamentals of Software Engineering
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The use of automata for specifying patterns of task generation has broaden the perspective of schedulability analysis; scheduling has moved from periodic or rate-monotonic to aperiodic and non-uniform tasks. The question of schedulability in this setting, however, is not always decidable; with a preemptive scheduler, it is shown to be decidable for very restricted task models, e.g., when a task is modeled merely as a fixed computation time. In this paper, we consider the possibility of specifying tasks using timed automata. We show that, in this more complex setting, decidability holds not only for non-preemptive schedulers but also for preemptive schedulers if a minimum delay is assumed between consecutive preemptions. In practice, this minimum can be a multiple of the CPU clock speed. We show further how to extend from a single processor to multi-processor models with shared and/or separate queues.