A two-phase dynamic dispatching approach to semiconductor wafer testing

Authors:
Yin-Yann Chen;James T. Lin;Tzu-Li Chen
Affiliations:
Department of Industrial Management, National Formosa University, Yunlin 632, Taiwan;Department of Industrial Engineering and Engineering Management, National Tsing-Hua University, Hsinchu 300, Taiwan;Department of Information Management, Fu Jen Catholic University, Taipei 242, Taiwan
Venue:
Robotics and Computer-Integrated Manufacturing
Year:
2011

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Abstract

There have been numerous advancements and rising competition in semiconductor technologies. In light of this, the wafer test plays a more significant role in providing the most prompt yield feedback for quick process improvement. However, the wafer test shop floor is getting more complicated than ever before because of the increasing change-over rate, nonlinear wafer arrival, and preemption by urgent orders. Furthermore, the foundry wafer test is a heterogeneous production with different production cycle times and a large variety of nonidentical testers. Shop floor conditions, including work in process (WIP) pool, tester status, and work order priority, continuously change. There is a need to operate the kind of production line that simultaneously fulfills multiple objectives. Such objectives are maximum confirmed line item performance (CLIP) for normal lots, 100% CLIP for urgent lots, minimum change-over rate, and shortest cycle time. Thus, a reactive dispatching approach is proposed and expected to perform a real-time solution no matter how/what the shop floor would change. The dynamic approach is mainly triggered by two kinds of major events: one is when an urgent lot comes in, and the other is when a tester is idle. In addition, through a two-phase dispatching algorithm, lot ranking, and lot assignment methods, prioritized WIP lots and an appropriate lot assignment are suggested. A better performance measure is obtained by considering the multiple objectives the wafer test operations seek to achieve.