RapidMind: portability across architectures and its limitations

  • Authors:
  • Iris Christadler;Volker Weinberg

  • Affiliations:
  • Leibniz-Rechenzentrum der Bayerischen Akademie der Wissenschaften, Garching bei München, Germany;Leibniz-Rechenzentrum der Bayerischen Akademie der Wissenschaften, Garching bei München, Germany

  • Venue:
  • Facing the multicore-challenge
  • Year:
  • 2010

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Abstract

Recently, hybrid architectures using accelerators like GP-GPUs or the Cell processor have gained much interest in the HPC community. The "RapidMind Multi-Core Development Platform" is a programming environment that allows generating code which is able to seamlessly run on hardware accelerators like GPUs or the Cell processor and multi-core CPUs both from AMD and Intel. This paper describes the ports of three mathematical kernels to RapidMind which have been chosen as synthetic benchmarks and representatives of scientific codes. Performance of these kernels has been measured on various RapidMind backends (cuda, cell and x86) and compared to other hardware-specific implementations (using CUDA, Cell SDK and Intel MKL). The results give an insight into the degree of portability of RapidMind code and code performance across different architectures.