A Gaussian synapse circuit for analog VLSI neural networks

  • Authors:
  • Joongho Choi;Bing J. Sheu;Josephine C.-F. Chang

  • Affiliations:
  • IBM T. J. Watson Research Center, Yorktown Heights, NY and University of Southern California, Los Angeles, CA;Department of Electrical Engineering, University of Southern California, Los Angeles, CA;Department of Electrical Engineering, University of Southern California, Los Angeles, CA

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 1994

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Abstract

Back-propagation neural networks with Gaussian funetion synapses have better convergence property over those with linear-multiplying synapses. In digital simulation, more computing time is spent on Gaussian hetion evaluation. We present a compact analog synapse cell which is not biased in the subthreshold region for fully-parallel operation. This cell can approximate a Gaussian function with accuracy around 98% in the ideal case. Device mismatcb induced by fabrication process will cause some degradation to this approximation. The Gaussian synapse cell can alsa he used in unsupervised learning. Programmability of the proposed Gaussian synapse cell is achieved by changing the stored synapse weight Wji, the reference eumnt and the sizes of transistors in the differential pair.