Fast estimation of timing yield bounds for process variations

Authors:
Ruiming Chen;Hai Zhou
Affiliations:
Department of Electrical Engineering and Computer Science, Northwestern University, Evanston, IL;Department of Electrical Engineering and Computer Science, Northwestern University, Evanston, IL
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2008

Citing 11
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Abstract

With aggressive scaling down of feature sizes in VLSI fabrication, process variation has become a critical issue in designs. We show that two necessary conditions for the "Max" operation are actually not satisfied in the moment matching based statistical timing analysis approaches. We propose two correlationaware block-based statistical timing analysis approaches that keep these necessary conditions, and show that our approaches always achieve the lower bound and the upper bound on the timing yield. Our approach combining with moment-matching based statistical static timing analysis (SSTA) approaches can efficiently estimate the maximal possible errors of moment-matching-based SSTA approaches.