Simulated evolution (SimE) based embedded system synthesis algorithm for electric circuit units (ECUs)

Authors:
Umair F. Siddiqi;Yoichi Shiraishi;Mona A. El-Dahb;Sadiq M. Sait
Affiliations:
Department of Production Science & Technology, Gunma University, Japan;Department of Production Science & Technology, Gunma University, Japan;Department of Production Science & Technology, Gunma University, Japan;King Fahd University of Petroleum & Minerals, Dhahran, Saudi Arabia
Venue:
ICANNGA'11 Proceedings of the 10th international conference on Adaptive and natural computing algorithms - Volume Part I
Year:
2011

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Abstract

ECU (Electric Circuit Unit) is a type of embedded system that is used in automobiles to perform different functions. The synthesis process of ECU requires that the hardware should be optimized for cost, power consumption and provides fault tolerance as many applications are related to car safety systems. This paper presents a Simulated Evolution (SimE) based multiobjective optimization algorithm to perform the ECU synthesis. The optimization objectives are: optimizing hardware cost, power consumption and also provides fault tolerance from single faults. The performance of the proposed algorithm is measured and compared with Parallel Re-combinative Simulated Annealing (PRSA) and Genetic Algorithm (GA). The comparison results show that the proposed algorithm has an execution time that is 5.19 and 1.15 times lesser, and cost of the synthesized hardware that is 3.35 and 2.73 times lesser than the PRSA and GA. The power consumption of the PRSA and GA (without fault tolerance) are 0.94 and 0.68 times of the proposed algorithm with fault tolerance.